Inside a processor there is nothing that knows what "7" means. There are only transistors, and a transistor in a digital chip is used as a switch: a voltage on one terminal lets current flow between the other two, or stops it. A wire is either at high voltage or low. Call those 1 and 0, and you have everything a computer works with.
That is why computers count in binary. In decimal each column is worth ten times the one to its right. In binary each column is worth twice as much: 1, 2, 4, 8, 16 and so on. So 1011 means 8 + 0 + 2 + 1, which is eleven. Any whole number can be written this way using only the two states a switch can be in.
The question is how switches can add. The answer was worked out in 1937 by Claude Shannon, then a master's student at MIT. He showed that circuits of on/off relays behave exactly like Boolean logic, the algebra of true and false. In the last chapter of his thesis he drew a circuit that adds binary numbers.
Put two switches in a row and current only gets through if the first and the second are closed. That is an AND gate. Put them side by side and current gets through if either is closed: an OR gate. In modern chips each gate is a small group of transistors arranged so the output wire is pulled up to 1 or down to 0. The workhorse NAND gate ("not and") takes just four transistors.
The gate addition needs most is XOR, "exclusive or". Its output is 1 when exactly one input is 1, and 0 when both inputs match. XOR takes a few more transistors than AND, but it is still only a handful.
Add two single bits and there are only four cases:
Look at the right-hand digit of each answer. It is 1 when exactly one input is 1. That is XOR. Now look at the carry. It is 1 only when both inputs are 1. That is AND. So one XOR gate and one AND gate, fed the same two wires, add two bits. This pair is called a half adder.
A half adder is enough for the rightmost column, but every other column has three things to add: a bit from each number plus the carry from the column to its right. That is what you do on paper too.
The fix is to use two half adders. The first adds the two bits. The second adds the carry to that result. If either half adder produced a carry, this column passes a carry to the left, so an OR gate joins the two carry wires. That is a full adder. The textbook CMOS version uses 28 transistors.
To add two 4-bit numbers, put four full adders side by side, one per column, and wire each carry output into the carry input of the next adder to the left. The rightmost carry input is tied to 0. The last carry output becomes the fifth bit (worth 16) of the answer. That is the whole machine. Try it below.
Inside full adder 0
Things to try:
The ripple-carry adder has a weakness you can see in slow motion. The leftmost column cannot give its final answer until the carry has passed through every column to its right. Each stage adds a couple of gate delays, so a 64-bit ripple adder is slow by processor standards.
Real processors use carry-lookahead designs. They compute, for every column at once, whether it will generate a carry (both bits are 1) or propagate one (exactly one bit is 1). Those are the AND and XOR outputs of the first half adder. Extra logic combines these signals in a tree, so all the carries are known after a few levels of gates instead of a long chain. It costs more transistors and saves time.
The 4-bit adder above, at 28 transistors per full adder, needs 112. Intel's 4004 of 1971, often called the first commercial microprocessor, was itself a 4-bit chip, and the whole thing had about 2,300 transistors.
The A17 Pro chip in an iPhone 15 Pro has 19 billion. That would be enough for roughly 680 million full adders, though of course most of a chip is memory, wiring and control, not adders. Nvidia's Blackwell B200, a data-centre processor, packs 208 billion onto two joined dies. Underneath all of it is the same idea: a switch that is on or off, wired so that 1 + 1 comes out as 10.